| 摘要 |
PURPOSE:To reduce the difference between each collector current caused by leak currents without increasing an area, by arranging a pattern in the manner in which the axis of symmetry of a PNP transistor is made parallel to the growth direction of an N-type buried layer. CONSTITUTION:The crystal growth direction of an N-type buried layer 90 and the axis of symmetry 12 of a PNP transistor are formed in paralleled with each other. In such a device, the positive hole density distribution in the base region 5 of a parasitic PNP transistor in the vertical direction becomes symmetric with respect to the axis of symmetry 12 of the PNP transistor. As the result thereof, the leak currents I3 and I5 become equal to each other, which flow from an emitter region 1 to a substrate 10 passing just under the respective collector regions 3a and 3b. Thus each of collector currents I1 and I2 becomes equal.
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