| 摘要 |
PURPOSE:To execute a DMA operation to a main storage device having a large capacity, by providing a means for deciding whether an address from an input/output control device is the maximum value or not, and a means for detecting a fact that a DMA transfer between the input/output control device and a storage device is ended. CONSTITUTION:A carry circuit 13 decides the maximum address signal 12 from a deciding circuit 11, when a DMA end signal 10-1 is received from a DMA (Direct memory Access) controller 8, and if it is off, a state that a carry signal 14-1 remains off is continued and carry to an extended address register 5-1 is not executed, and if said signal is on, the carry signal 14-1 is turned on and '1' is added to the contents of the extended address register 5-1. As a result, an address which is brought to an access to a main storage device 2 becomes (10000)16, and brought to an access by the next correct address of (OFFFF)16. Accordingly, both 16 bits of an address signal outputted from an IOC 3-1 and 2 bits of the contents of the extended address register 5-1 are made to execute carry operation.
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