| 摘要 |
PURPOSE:To attain high speed processing by providing the 2nd register outputting a pointer instructing a run length counting start bit. CONSTITUTION:A ROM 12 outputs a run length value and a control data according to the logic programmed in advance. A run length value RLG outputted in such a way is inputted to one input terminal of an adder 13. The output of the adder 13 is connected to the input of a register (LCH 2) 15 and used to store temporarily the run length outputted while being integrated by the adder 13. An output terminal of the register 15 is connected to other input terminal of the adder 13. A 5-bit control data CTRL outputted from the ROM 12 is inputted to a register (LCH 1) 14, where the data is stored temporarily. Thus, when a picture image data in one cycle has arranged white or black level bits, it is possible to execute continuously plural special steps and in parallel.
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