| 摘要 |
PURPOSE:To reduce the area of a memory array by forming a memory element with two pieces of transistors having a two-bit information connected in series to reduce by half the number of pieces of the contact holes on bit lines. CONSTITUTION:When the output N1 of a NOR circuit decoder 5 is turned in a low level, a transistor TR12 causes the gate voltage of the two memory transistors to come in the low level. The transistor TR12 is set so that the above said low level of the gate voltage goes lower than the lower one of the thresholds of the memory transistors. Thus one of addresses that relate to a word line is used for determining the combination of the gate voltage of the two transistors in series connection. The write of the two-bit storage information is executed in a way that, one of the four kinds of write information that are unequivocally determined by the two-bit information relating to one address, is stored. As a result, the number of pieces of the contact holes on the bit line is reduced to half, and the memory array area is also reduced. |
