| 摘要 |
PURPOSE:To prevent the deciding of a noise as a control signal by mistake by outputting the same comparing signal as a control signal and multiplying this and an input signal when a locking condition is obtained by using a digital signal processing type PLL circuit. CONSTITUTION:When an input signal including the noise of the same frequency as the procedure interrupting signal of 462Hz enters a PLL circuit 10, the PLL circuit 10 hardly comes to be a locking condition. Even if locking is executed, the locking is instantaneously released at once. When the input signal including the inherent procedure interrupting signal of 462Hz enters the PLL circuit 10, the PLL circuit 10 comes to be the locking condition. Namely, the PLL circuit sends a phase signal to synchronize with the procedure interrupting signal to a SIN wave generator 11. For such a reason, the SIN wave generator 11 generates the SIN wave signal having the completely same procedure interrupting signal, frequency and phase. Consequently, for the multiplying result of both signals, a large peak occurs at a 90 deg. position, this exceeds the threshold and therefore, a slicer 14 outputs '1'. As such a result, it is detected that the procedure interrupting signal comes.
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