发明名称 SEMICONDUCTOR MEMORY ELEMENT
摘要 PURPOSE:To set an interval between fuses widely regardless of a decoder by providing a control circuit that includes fuses that is cut off corresponding to the defective address outside of a decoder, and controlling the decoder. CONSTITUTION:Plural decoder control circuits are provided in series connection, and a signal phi1 is outputted as a driving signal of the decoder. When an address corresponding to a defective memory is impressed from the external, points H, J, I, K, and M come in an H-level during a precharge period. During an active period, transistors Q10, Q11 are turned ON, however, since the fuse FA1 is cut off, the points I and K hold in the H-level and an address signal A1 is led, a point L comes to the H-level to turn a transistor Q16 ON. In case of the address corresponding to a defective memory, since all the transistors of respective control circuits corresponding to the transistor Q6 are turned ON, points Pn and P come to an L-level thereby causing the driving signal phi1 not to be outputted. As a result, the fuses can be disposed at the outside of the decoder, and the interval between the fuses can be set widely regardless of the decoder.
申请公布号 JPS62200599(A) 申请公布日期 1987.09.04
申请号 JP19860042552 申请日期 1986.02.26
申请人 SHARP CORP 发明人 MURAKAMI YUKICHI
分类号 G11C29/00;G11C11/34;G11C29/04 主分类号 G11C29/00
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