| 摘要 |
PURPOSE:To prevent such a case where a sequence programs is changed by noises, etc., during operation of a controller by deciding whether a D flip-flop has a run mode or a program mode from execution of the signal processing routine and using the output of said flip-flop to control the open/close of an OR gate. CONSTITUTION:The NPR address is read out regardless of a run mode or a program mode and therefore the '0' output of a decoder 2 is changed to a low level from a high level. This '0' output is used as the clock signal of a D flip-flop 1. In a run mode '1' is written in the NPR address as data and therefore the data D0 of a data bus is set at '1'. Thus the output Q is latched at a high level since the input D is equal to '1' when the clock signal is supplied. Then the output of an OR gate 4 is kept at a high level regardless of the state of the write signal, the inverse of WT, which is regarded as an active low level. Thus it is inhibited that the write signal, the inverse of WT, i.e., the input at the other side of the gate 4 is supplied to a write control terminal, the inverse of WE, of a memory 5.
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