发明名称 REGISTER WRITING SYSTEM
摘要 PURPOSE:To reduce the burden of a program without increasing a scale of a hardware, by executing a write operation to a memory for holding an address in common, and executing simultaneously write to a register and the storage of a copy of the contents of the register to a memory. CONSTITUTION:A microprocessor 1 outputs desired data to a write data bus 101, and also outputs a specified address (i) to an address bus 102, and sets a memory write signal 201 to '1'. As a memory write signal 201 is '1', a memory 2 writes the data of the write data bus 101 to the designated address (i) by the address bus 102. On the other hand, a decoder 4 discriminates a fact that an address of the address bus 102 is the specified address (i). In this case, since the memory write signal 201 is '1', an AND gate 5 writes the data of the write data bus 101 to a register 3 simultaneously with the memory 2 by setting a register write signal 203 to '1'.
申请公布号 JPS62196745(A) 申请公布日期 1987.08.31
申请号 JP19860037633 申请日期 1986.02.22
申请人 HITACHI LTD 发明人 MAKIURA YASUHIKO
分类号 G06F9/30;G06F7/00;G06F12/00;G06F12/06 主分类号 G06F9/30
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