| 摘要 |
PURPOSE:To improve the reliability and efficiency by providing a semiconductor layer including a hyper abrupt junction formed by an n(p) semiconductor and a p(n) semiconductor, a peizoelectric layer laminated on the semiconductor layer and >=2 electrodes formed on the piezoelectric layer. CONSTITUTION:The monolithic structure is provided, where the n(p) semiconductor layer 12, the p(n) semiconductor layer 14 and the piezoelectric layer 16 are arranged as layers in this order. Signal input and reference signal input interdigital electrode 20, 22 are arranged on the piezoelectric layer 16 in the lengthwise direction of the piezoelectric layer 16. The hyper abrupt junction 18 is formed between the semiconductor layers 12 and 14. A depletion layer capacitance (C) versus applied voltage (V) characteristic curve with a steep gradient is obtained from the junction 18, and since the depletion layer capacitance changes rapidly or remarkably when the applied electric field is changed slightly, the efficiency or sensitivity is improved. Since the monolithic structure is adopted, the high reliability is obtained.
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