| 摘要 |
PURPOSE:To perform the processing of a decoder or an encoder at high speed and to simplify the enlargement and the reduction at high speed by decoding encoding data to the change point address from a white picture element to a black picture element and from the black picture element to the white picture element, applying the operation to this change point address data and encoding the enlarged and reduced change point address. CONSTITUTION:The change point address data is decoded by the change point address decoder 1 and stored in a change point address memory 2. The change point address data from the change point address memory 2 is initially inputted to the scanning line enlarging and reducing circuit 6 of an enlargement and reduction device 3. A change point address arithmetic circuit 7 multiples the change point address data inputted from the scanning line enlarging and reducing circuit 6 by the coefficient data of the multiplying factor for the enlargement and the reduction or the like outputted from a coefficient device 9 by a multiplier 8 and the multiplied result is half adjusted to an integer by a half adjust circuit 10. Finally, the enlarged or reduced change point address data is encoded according to a designated facsimile encoding system by the change point address encoder 4. |
