| 摘要 |
PURPOSE:To decrease number of circuit components and to improve the circuit integration by constituting a tri-state output circuit comprising CMOS by eight transistors (TRs) except an inverter circuit inverting an output enable signal OE. CONSTITUTION:Sources of P-channel MOSFETs Q1, Q3 are connected to a power supply voltage Vcc and drains of them are connected to a gate of a P-channel MOSFET Q4 of an output CMOS inverter circuit in common respectively and an input data Din is given to one gate and an output enable signal OE is fed to the other gate. Sources of N-channel MOSFETs Q6, Q7 are connected to a ground potential and drains are connected to a gate of an N-channel MOSFET Q8 of the output CMOS inverter circuit respectively in common, and the input data Din is given to one gate and an inverse of signal OE is fed to the other gate. Further, MOSFETs Q2, Q5 are connected in common between drains of the FETs Q1, Q3 and the FETs Q6, Q7. The FETs Q2, Q5 are made conductive when the signal OE is effective. |
