SEMICONDUCTOR STORAGE DEVICE

摘要

PURPOSE:To simplify address control at the time of reading data sequentially from a desired memory area that extends over plural lines of a memory array by providing an address counter which latches the address of the line of the memory array where the said reading begins, and which is able to sequentially modify the latched address into the address of the following line based on a controlling signal. CONSTITUTION:In order to serially output a data latched by a data latch circuit Rd, the Y-address counter Cy which forms such address data as sequentially modified by counting clock signals C, is provided. Also, a data selector Sd which receives counter address signals sequentially outputted from the counter Cy and functions to let data be outputted serially and sequentially from the addresses on the circuit Rd corresponding to the said signals received. The amount of data outputted from the circuit Rd and the data transmission rate is controlled by the pulse number and the frequency of the clock signal C.