| 摘要 |
PURPOSE:To relax power fluctuation in a semiconductor chip, and to reduce the malfunction of a logic gate by AC noises by arranging another power bus line to the upper layer of a wiring layer, in which there is one power bus line, through an insulating film. CONSTITUTION:Each wiring layer of first layer wirings 1, a second layer 2 and a third layer 3 is mutually isolated electrically by insulating layers 4, a first power bus line 5 is formed by the first layer wirings and a second power bus line 6 by the third layer wiring, and a logic gate is supplied with a power supply by a contact 7 with an element, an opening 8 between the first layer wirings and the second layer wiring and an opening 9 between the second layer wiring and the third layer wirings. There are wiring capacitances C12, C13 between each wiring layer, and capacitances between power supplies are shaped extending over approximately the whole surfaces of the power bus lines according to such a power supply laying method. The capacitances work in the direction that sudden power fluctuation is stabilized, and fill the role of the prevention of the malfunction of the logic gate. |
