发明名称 MULTIPLE ACCESS TIME SWITCH
摘要 PURPOSE:To suppress the exchange delay to a required minimum value by applying the data write to both sides of time switches depending on the necessity of the sequence of the data of a single frame for one side each or for both sides simultaneously. CONSTITUTION:Input information D is given to switches 1, 2 and written in synchronism with a counter 7 of 2-frame period. A control signal represented whether each time slot data calls for the sequence or not is stored in a write control memory 5 and a write control circuit 3 applies the write control of information D based on the control signal and the frame member of the counter 7. That is, the data requiring the sequence at a frame number '0' applies write to the switch 1, the data requiring the sequence in the frame 1 applies write to the switch 2 and the data not requiring the sequence applies write to both the switches 1, 2 at each frame. The written data is outputted via a selection circuit 4.
申请公布号 JPS62194797(A) 申请公布日期 1987.08.27
申请号 JP19860037010 申请日期 1986.02.20
申请人 NEC CORP 发明人 SHIMIZU TOMOYOSHI;KOBAYASHI TATSUO
分类号 H04Q11/04 主分类号 H04Q11/04
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