| 摘要 |
A description is given of a memory cell of a dynamic MOS random-access memory or dRAM, an MOS transistor being formed on a silicon layer (4) applied in the form of an island on a silicon substrate (1), with isolation by a thermal oxide layer (3). A capacitor is in this case of the groove type. An isolated capacitor electrode (5) is embedded or recessed into a groove (2) cut into the silicon substrate (1), with the thermal oxide layer (3) interposed. The isolated capacitor electrode (5) is in this case in contact with the source zone (81) of the MOS transistor. This capacitor electrode (5) in this case acts as an independent or isolated memory node for each (relevant) memory cell. The silicon substrate (1) is in this case provided as a common capacitor electrode for the number of memory cells. <IMAGE>
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