| 摘要 |
PURPOSE:To decrease the laod of a channel processor and to improve the data transferring efficiency of a DMA control mechanism by executing the transferring control without depending upon a channel processor. CONSTITUTION:At plural repective input output devices 1A and 1B, DMA control circuits 5B and 5C aare provided, and a DMA control mechanism 3 is composed of a sub-channel 2, a channel processor 4 and a DMA control circuit 5A. DMA control circuits 5A, 5B and 5C are control circuits to instruct the DMA control mechanism 3 and the input output devices 1A and 1B to change over the data transfer. Thus the load of the channel processor 4 can be decreased and the DMA transfer ratio can be improved. |
