| 摘要 |
PURPOSE:To realize a wide pull-in characteristic by moving a notched part in the pull-in characteristic of a PLL circuit to plural frequency deviations and supervising them. CONSTITUTION:A phase comparator 22 outputs a lead signal 3 and a lag signal 4 depending whether an input signal 1 is led or lag to/from a reference signal 2 to count up or down for an up-down counter 25. The counter 25 is set to a median when it causes carry in increasing or decreasing directions. The increasing carry of RWFs 23, 24 is outputted as lead pulses 5, 8 and the decreasing carry is outputted as lag pulses 6, 9. The lead/lag pulses 5, 6 being the output of the RWF 24 are inputted as up/down pulses of the up-down counter 25. The counter 25 integrates the outputs of the RWF 24 and the result corresponds to the complete integration term of a PLL circuit.
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