发明名称 SYNCHRONIZING OFFSET SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To stabilize a correct restoration in the offset part of a synchronizing offset signal and to improve the picture quality by comparing the respective hold voltages corresponding to the offset part and a normal part and adjusting a bias to a level control circuit so as to bring this difference voltage into a prescribed value. CONSTITUTION:In a synchronizing offset processing circuit consisting of the input circuit A1 of the synchronizing offset signal, a level processing line A2, an output circuit A3 and a level control circuit A4, the synchronizing signals respectively corresponding to the offset part and the non-offset part (normal part) are individually sampled to sample and hold circuits 33, 34 among restoring signals and the difference between the respective hold voltages V1, V2 (the same value is the restoration is correct) is operated in an arithmetic circuit A6. The direct current bias part (a resistance 39, a transistor 38) of the control circuit A4 is automatically adjusted so as to stabilize this difference to the prescribed value. Thereby, the restoration in the offset part of the synchronizing offset signal is stable and correct, which contributes to the improvement of the picture quality.
申请公布号 JPS62188578(A) 申请公布日期 1987.08.18
申请号 JP19860030136 申请日期 1986.02.14
申请人 TOSHIBA CORP 发明人 MURAMATSU YASUHIRO;MINEMURA KOICHI;MASUKO AKINOBU
分类号 H04N7/171;H04N7/167 主分类号 H04N7/171
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