摘要 |
PURPOSE:To suppress fluctuation and to pull-in the phase momentarily by providing a control circuit controlling a value K in the frequency division circuit based on a phase lead pulse and a phase lag pulse outputted from a phase comparator so as to change the frequency division ratio of the frequency division circuit. CONSTITUTION:An oscillation circuit 11 oscillating a pulse signal of a frequency F(R+M+1)Hz, an edge circuit 2 detecting the leading edge or trailing edge of an input digital signal inputted to an input terminal 1 and generating a pulse whose width is less than 1/F(R+M+1) sec and a control circuit 5 controlling the shift of a carry pulse of a counter 8 by (M+1+ or -K)-bit in a shift register 10 are provided. The control circuit controls the value K of the frequency division circuit to 0 or 1 based on the phase lead pulse an the phase lag pulse. Thus, the fluctuation of the phase is suppressed sufficiently and the phase is pulled-in quickly.
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