| 摘要 |
PURPOSE:To remove the low yield of production due to the shortage of capacity of memory cells as well as to contrive improvement in driving speed without increasing the capacitance of a word line by a method wherein the accumulation capacitor part of a polysilicon layer and an active MOSFET (metal oxide semiconductor field effect transistor) are coupled together. CONSTITUTION:An n<+> layer 17 and a p<+> layer 18 are formed on the substrate surface of an accumulation region. As a result, the capacitance Cs of a cell can be made larger. Especially, a substantial increase in cell capacitance can be achieved by the equilibrium with the first gate insulating film of SiO2-Si3N4 laminar structure. Also, said n<+> layer 17 and p<+> layer 18 work as the barrier of radiation rays such as alpha rays and the like coming from outside, and the stability of a memory readout operation can be improved. |
