发明名称 REGISTER ARRAY
摘要 <p>PURPOSE:To enable access to registers by various method, to increase the freedom of a program and to improve the access processing speed of a register by addressing the register from both line and row directions. CONSTITUTION:When address signals A2-A0 are supposed to be '110', a decoder AD6 is activated and a register array TCON32-02 is selected. If R/W=0, data on data buses DB3-DB0 are written in a latch of an inverter I1-I2 through buffers RW3-RW0 and a transfer gate TX in the TCON32-02. When R/W=1, the data in the latch of the I1-I2 are outputted to the D3-D0 through the TX in the TCON32-02 and read out to the DB3-DB0 through the RB.</p>
申请公布号 JPS62187939(A) 申请公布日期 1987.08.17
申请号 JP19860030090 申请日期 1986.02.13
申请人 NEC CORP 发明人 MIYATA SHINJI
分类号 G06F15/78;G06F9/34;G06F12/00;G06F12/06;G11C11/41 主分类号 G06F15/78
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