| 摘要 |
PURPOSE:To contrive the improvement in quality and yield of semiconductor devices by forming openings for electrical connection of a wiring region of a semiconductor device and a wiring material shallowly by eliminating conventional deep openings which reach a semiconductor substrate. CONSTITUTION:An intermediate wiring material 9 is formed on a connection window part 8, i.e., a connection part of a source 3 and a drain 4 and on a surface of an interlaminar insulating film 2 formed on the source 3 and drain 4 side to the same thickness as that of a gate material, i.e., polysilicon in this embodiment. Next, an interlaminar insulating film 10 is formed on the surface of the interlaminar insulating film 2 and the intermediate wiring material 9 and the surface is made even. To electrically connect the source 3 and the drain 4 to a wiring material through the intermediate wiring material 9, a part of the interlaminar insulating film 10 is removed to form openings 11 down to the intermediate wiring material 9. Similarly, a part of the interlaminar insulating films 2 and 10 is removed to form openings 12 down to the surface of a gate 5 in order to connect the gate 5 to the wiring material and the depths of the openings 11 and 12 are roughly the same. Then, the wiring material is formed in the openings 11 and 12.
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