发明名称 CALCULATION LOGICAL ARITHMETIC UNIT
摘要 PURPOSE:To execute AMI encoding by one machine cycle by providing the titled device with an auxiliary arithmetic unit for inputting the outputs of all adders and a control device for controlling the input and carry of all the adders and the auxiliary arithmetic unit. CONSTITUTION:An input A to the calculation logical arithmetic unit ALH is applied to terminals 3a-3d successively from the low-order bit. Similarly, an input B is applied to terminals 4a-4d. Calculated results F0-F3 are outputted to terminals 5a-5d and the decisions (AMI codes) DL, DH of three values satisfying A>B, ¦A¦<=B or A<-B are outputted to a terminal 50. When the ALH is to execute AMI encoding, an input signal and a threshold signal are applied to the inputs A, B respectively and instructions I0-I3 for switching the functions of the ALH are applied to terminals 70-73. On the other hand, C0-C3 are carries for respective bits and controlled by internal control signals Cin, S6. In addition, X0-X3 and Y0-Y3 are inputs to all the adders 6a-6d for respective bits.
申请公布号 JPS62187929(A) 申请公布日期 1987.08.17
申请号 JP19860031121 申请日期 1986.02.13
申请人 MITSUBISHI ELECTRIC CORP 发明人 KONDO HARUFUSA;ANDO HIDEKI
分类号 G06F7/02;G06F7/38;G06F7/508;G06F7/575;H03M1/34;H03M5/18 主分类号 G06F7/02
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