发明名称 SEMICONDUCTOR MEMORY CIRCUIT
摘要 <p>PURPOSE:To pre-charge only one selected address line, and to decrease power consumption, by performing the pre-charge of the address line in a ROM through an address line decoder circuit. CONSTITUTION:Signals of positive/negative polarity on word lines Wa and Wb are inputted to each of the gate lines of N-type of MOS transistors 6-11 within an address decoder, and one of address lines 2-5 in ROM1 is selected, and is connected to an address line decoder output 14. At the time of a pre- charge signal PRCK is inputted, a P-type of MOS transistor 12 is turned on, and an N-type of MOS transistor 13 is turned off, and a power source VDD is connected to the output line 14, thereby, a selected address line is pre-charged. Therefore, no pre-charge is performed on a non-selected address line, and a circuit is made into low power consumption.</p>
申请公布号 JPS62188097(A) 申请公布日期 1987.08.17
申请号 JP19860029233 申请日期 1986.02.13
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SUGIFUCHI HISASHI
分类号 G11C17/18;G11C17/00 主分类号 G11C17/18
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