| 摘要 |
PURPOSE:To generate plural synchronized and cyclic signals by providing a symbol data recording a signal pattern, selecting a pattern recorded in the signal data by a signal control section and outputting the pattern from the signal output section. CONSTITUTION:A signal control section 1 consists of a counter 11 and a latch 12 and a required signal pattern is selected from a signal data section 2 of the next stage. The data section 2 consistof a memory 21, and various signal patterns are recorded in advance. A signal output section 3 consists of a latch 31 and outputs cyclicly the signal pattern recorded in the data section 2l An address signal incrementing an address signal ADR outputted by the counter 11 is inputted sequentially via a latch 12 to an address pin of the memory 21 together with the signal SEL synchronously with a clock CK. Thus, the required signal pattern is selected to output plural cyclic signals synchronized with each other.
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