| 摘要 |
PURPOSE:To obtain high speed communication in which no data contention is generated among CPUs by giving priority to a write that comes first when the writes are performed simultaneously on a two-way storage means, and providing a mediation circuit which separates the other write from the storage means. CONSTITUTION:When a microcomputer 1a at a master side performs a write operation first to registers R0 and R0' on which the same addresses are allocated, registers R1-Rn are separated from a data bus 3b with a mediation circuit 4. Therefore, a microcomputer 1b at a slave side is not able to perform the write to the registers R1-Rn. Similarly, when a slave side performs the write first, a master side is prevented from writing with the circuit 4. In this way, a contention can be evaded even when the simultaneous write is performed, because the register is structured in a double buffer, and also, a separation of a bus 3a or the bus 3b is performed with the circuit 4, therefore, the contention of the data for the common registers R1-Rn can be evaded. |
