发明名称 DISCRETE TIME CONTROLLER
摘要 PURPOSE:To automatically stop the estimation of a parameter without complicated manual operation as long as the operation attains a steady state and to continue applicable control by providing a steady state deciding block and a sampling means. CONSTITUTION:In case of switching a steady state control system to a transit state control system, first a target value Wk is checked to have been modified or not. If not, a controlled variable is checked to lie within a range of + or -0.5% of the target value. If not, a steady state deciding counter in the steady state deciding block 12 is cleared, and the parameter of a discrete time type model 5 is estimated through the sampling means 3 and the parameter estimating block 4. The model generates the future sequence of controlled variables, predicts the response and carries out applicable control. After the operation attains the steady state in such a way, automatically the estimation of the parameter stops without complicated manual operation, and applicable control can continue.
申请公布号 JPS62184502(A) 申请公布日期 1987.08.12
申请号 JP19860026485 申请日期 1986.02.07
申请人 OMRON TATEISI ELECTRONICS CO 发明人 OSAKI KAZUHIKO;YOSHIKAWA NORIO
分类号 G05B17/02;G05B21/02 主分类号 G05B17/02
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