| 摘要 |
PURPOSE:To facilitate the reduction of the scale of a hardware, and the modification or addition of functions, by dividing each function part of an interface circuit, and communicating between divided functions with a general control signal in which the difference among the classes of processors are absorbed. CONSTITUTION:A data transfer circuit 201 informs the presence of an output data from a functional block to a bus control signal generation circuit 202 with a general control signal RQO. The circuit 202, in an I/O transfer, requests an interruption to output to a control bus 203. A general purpose microprocessor 204, when receiving the interruption, sends a reading control signal onto the bus 203. A bus control signal conversion circuit 205, after converting the control signal to a general control signal DO within the inside of a functional module corresponding to the classes of the general purpose microprocessors, outputs it to the circuit 201, and the circuit 201 outputs a data according to the signal DO to a data bus 206. The data is received by the processor 204. Adversely, when the processor 204 outputs the data, the circuit 201 receives the data almost in a reverse action.
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