摘要 |
PURPOSE:To increase input channels only by connecting a control circuit additionally in parallel to a line driver by providing counters which operate with a common clock and a monitor circuit which detects whether or not there is output-side data and stopping the operation of the counters according to the detection result. CONSTITUTION:Counters 6 count common clock pulses and preset values P1, P2, P3...Pn corresponding to addresses A1-An of a data transmission control circuit 4 are given previously. The counters 6 when reset begin to count from the preset values as their initial values. The preset values are different, so the counters 6 differ in counting-up timing from one another. While a transmitting circuit 7 starts transmitting operation with the count-up signal of a counter 6, a gate control circuit 8 outputs a gate opening signal, the state of a tri-state buffer 9 is entered, and the transmission path of the transmitting circuit 7 is opened, thereby transmitting sent data. Consequently, the presence of data at an output pin 11 is detected by the monitor circuit 10, which outputs a stop signal to the counter 6.
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