| 摘要 |
PURPOSE:To detect the fault of a signal processor with simple circuit constitution by transferring the contents of an internal RAM of the signal processor having an address designated by an address bus to the internal RAM of the (N+1)-th signal processor prepared for detection of faults at the time of N pieces of signal processors are actuated in parallel with each other. CONSTITUTION:An address bus 20 must be set at '0' when the fault of a signal processor 1 is detected. Here only the contents of an internal RAM of the processor 1 are outputted to a bus signal line 90. While signal processors 2-4 output no output of contents of internal RAM. A control terminal 70 is enabled and the delivered RAM contents are written to the internal RAM of a signal processor 5. The signal processor functions to output the same signal with supply of the same input after the same RAM contents are once secured. |
