| 摘要 |
PURPOSE:To suppress a fixed pattern noise by providing a means which equalizes the low level potential of clocks H1 and H2 and a reference potential. CONSTITUTION:A terminal h1 of a horizontal clock pulse H1, a terminal h2 of a horizontal clock pulse H2, a terminal hl which sets a low level voltage HL of a scanning pulse, a terminal hs which sets a reference voltage HS of a scanning circuit, an image pickup element 11, a scanning circuit 12, a pulse generating circuit 13, and a logic circuit 14 are provided. Terminals hs and hl are connected directly. Both terminals are grounded by a resistance 15, and a small resistance 16 is inserted to a capacitor 18 to decouple it to an earth line, thereby preventing mixture of a clock noise. Thus, the voltage of the terminal hs and that of the terminal hl are made equal to each other and the clock noise is reduced, and an unnecessary current is not generated to suppress the fixed pattern noise.
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