| 摘要 |
PURPOSE:To process picture data inputted continuously with a simple device by using alternately a pair of buffer memories and processing the data on one of both buffer memories while the data is applied to the other buffer memory. CONSTITUTION:A sequential address generating circuit 1 and a magnification/ reduction address generating circuit 2 produce addresses synchronously with the clock phi respectively. Here the selectors 5, 6 and 7 select the magnification/ reduction address, the sequential address and the output of a buffer memory 4 respectively by a control circuit 8 when the picture data on the 1st line is supplied. Then the picture data is inputted to a buffer memory 3 according to the address value of the circuit 1. The memory 4 read out the contents and outputs them according to the address value of the circuit 2. When the picture data on the next line is inputted, the selectors 5-7 selects the sequential address, the magnification/reduction address and the output of the memory 3 respectively. Then the picture data is outputted from the memory 3 according to the address value of the circuit 2 and the picture data is stored in the memory 4 according to the address value of the circuit 1. These actions are repeated for each line. |
