| 摘要 |
A programmable attenuator includes a plurality of field effect transistors (FETS) arranged together to provide an attenuation network. Each one of the FETS has a plurality of cell portions, each cell portion having drain, gate and source regions, the source and drain regions of the cell portions being connected in parallel. A first selected portion of the gate regions of each one of said FETS is connected to a gate electrode. A second selected remaining portion of the gate regions of each one of the FETS has the gate regions thereof isolated from the gate electrode. A signal fed to the gate electrode of each FET is distributed to the connected gate regions of each field effect transistor. In response to such signal, the total drain-source resistance of such FET is changed between a predetermined low value and a predetermined high value, with the resistance of the predetermined high value being determined, in part, by the number of such isolated gate regions.
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