| 摘要 |
PURPOSE:To prevent a drop in a potential on the output side of a signal line by connecting the control electrodes of plural MOS transistors T in the prescribed style and interrupting the signal line before its potential at a level H drops. CONSTITUTION:The MOS transistors T61 and T62 are connected across the sources and drains of the MOS T12 and T13, and therefore they function as diodes conducting a current from the drain to the source. When a reset signal R becomes a potential VSS and enters a data transfer cycle, the MOS T14-T17 are separated from the signal lines 10 and 11, and the MOS T18 is also separated from the side of a junction 24. According to memory cell information, data is supplied to a transfer circuit 60 from a data bus latch circuit 5. In the circuit 60 its potential drops by following a potential VSS at a junction 24, 20 or 22, and the MOS T12 or T13 is cut off earlier. Thus a drop in the potential at the junction 21 or 23 can be appropriately prevented.
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