发明名称 SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To attain the A/D conversion to the ratio of the sum to the difference with high accuracy at high speed by obtaining the sum and difference of input analog signals analogically and applying a processing that one is use as a reference to compare it with the other. CONSTITUTION:The 1st, 2nd and 3rd circuits are provided, which consist of operational amplifiers A1, A2 and A3 respectively and each of which comprises a switch and a capacitor, the switch is switched by a signal generated from a clock, the capacitor voltage of the 1st circuit is used as the sum Vr of the input signals, the capacitor voltage of the 2nd voltage is used as the difference Vs of the input signals, the polarity of the difference Vs is decided by the 3rd circuit, the result is fetched to a shift register SR by the clock. Signals 2Vs-Vr, 2Vs+Vr are formed next according to the polarity, the polarity is decided by the 3rd circuit, the result is fetched in the shift register by using the clock, the similar processing is repeated up to a required bit number, and the analog/digital conversion of the ratio of the difference to the sum of the input signals is outputted from the shift register.
申请公布号 JPS62176332(A) 申请公布日期 1987.08.03
申请号 JP19860018961 申请日期 1986.01.30
申请人 NIPPON STEEL CORP 发明人 GOTO MITSUHIKO;ONO JIRO
分类号 H03M1/12;H03M3/00 主分类号 H03M1/12
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