发明名称 DATA PROCESSOR
摘要 PURPOSE:To attain execution of plural working modes by using he control memories which store plural different microprogram groups. CONSTITUTION:The address produced by an address producing circuit 12 is supplied to an address register AR13. The control memories 10-1-10-n and 11 store different microprogram groups in order to attain the desired working modes respectively and also have a common address space. When the addresses are designated to the memories 10-1-10-n by the register AR13, the contents of these addresses are supplied to a selecting circuit 14 at a time. Then a microinstruction is selected out of the memory designated by a register 15 and supplied to a selecting circuit 16 together with the contents received from the memory 11 for common processing. The circuit 16 selects the contents given from the memory 11 or the circuit 14 according to the presence or absence of a host bit of the register AR13 and outputs them to a microinstruction register MIR17.
申请公布号 JPS62175829(A) 申请公布日期 1987.08.01
申请号 JP19860018706 申请日期 1986.01.30
申请人 TOSHIBA CORP 发明人 UCHIBORI IKUO
分类号 G06F9/22 主分类号 G06F9/22
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