发明名称 MANUFACTURE OF MULTILAYER INTERCONNECTION
摘要 PURPOSE:To prevent the breakdown of a second interconnection layer and to implement miniaturization of an integrated circuit and the improvement in reliability, by forming a region, which receives reflected light from a first interconnection layer, in a large thickness, when the first interconnection layer having a specified pattern is formed in a specified region on a substrate and a second interconnection layer forming member is patterned on an interlayer insulating film covering the first interconnection layer. CONSTITUTION:In an element region of a semiconductor substrate 10 surrounded with a field oxide film 11, impurity regions 12, which are to become a source and a drain, are formed. A gate electrode 13 is formed between the regions 12. The electrode is covered with an insulating film 14. Then, a first interlayer insulating film 15 is formed so as to cover the impurity regions 12, the insulating film 14 and the field oxide film 11. Contact holes 16 are opened. First interconnection layers 17a and 17b in a specified shape comprising Al and the like, which are connected to the impurity regions 12, are formed. In a second interconnection layer forming member 18 comprising Al and the like, the thickness of a region 18a, which receives reflected light from the interconnection layer 17a, is made thicker than another region 18b. Thereafter, the member 18 is patterned, and a second interconnection layer 19 in a specified shape is formed.
申请公布号 JPS62176146(A) 申请公布日期 1987.08.01
申请号 JP19860017198 申请日期 1986.01.29
申请人 TOSHIBA CORP 发明人 NAKADA TAEKO
分类号 H01L21/3205;H01L23/52 主分类号 H01L21/3205
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