| 摘要 |
PURPOSE:To simplify circuit configuration and stabilize operation by sampling input composite synchronizing signals by the first and second pulses generated at the times of 1/3 and 2/3 of a horizontal scanning period and detecting starting position of the frame by comparing phase of sampling output. CONSTITUTION:Composite synchronizing signals (a) are inputted to a PLL circuit P through an equalizing pulse removing circuit 1 and output (b) phase synchronized with horizontal synchronizing signals is obtained from a frequency divider 6. The output is made to pulses (c) and (d) generated at the times 1/3 and 2/3 of the horizontal scanning period by a timing generating circuit T and applied respectively to clock terminals CK of DFF D1, D2. The signals (a) are applied to a D input terminal, and output (f) of D2 is applied to the D input terminal of DFF D3, and output (e) of D1 is applied to a clock terminal CK. Output (g) is differentiated by a differentiating circuit S and a pulse (h) generated first in the odd number fields, that is, pulses that indicate forefront of each frame are obtained. Then, by counting output of a voltage control oscillator 5 by a counter 7 and decoding by a decoder 8, required picture elements can be detected, and the counter 7 is reset by output (h).
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