发明名称 LOOP BUS CONTROL SYSTEM
摘要 PURPOSE:To form a decentralized type packet data processing device with a high reliability by constituting the problem in the continuity of a software processing apt to the control from an external part and the problem of the recovering time after a change-over by the logic of a hardware only and holding the certainty. CONSTITUTION:When a present-use communication is interrupted by some trouble, '0' system and '1' system loops are in operation independently, and therefore, in order to prevent the abnormality of a packet transmitting receiving processing by the change-over, a system control module 10 stops the packet communication of both systems. A control packet A to command the present-use type change of a loop bus controller from a system control module 12 is sent individually or by the multiple address mode to a loop bus controller 23 in a data processing module 20. The loop bus controller 23stops temporarily the data processing of data processing parts 22 and 24, changes over the confounding, connects a data processing part 22 and own part and thereafter, resumes the data processing of the data processing parts 22 and 24. The processing of the loop bus controller 23 is executed by a hardware sequence circuit.
申请公布号 JPS62175048(A) 申请公布日期 1987.07.31
申请号 JP19860017134 申请日期 1986.01.28
申请人 NEC CORP 发明人 KIYOTA KAZUNARI
分类号 H04L12/437 主分类号 H04L12/437
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