| 摘要 |
<p>PURPOSE:To substantially simplify control in terms of transferring display data and to shorten the processing time by providing a RAM equipped with a transistor which divides and controls a bit line, a data I/O circuit connected to the one divided bit line and a data output circuit connected to the other bit line. CONSTITUTION:The RAM 17 reads and writes contents in a cell whose address is designated by the contents of an Y register 15 and an X register 16, and can directly read out them to a display storing circuit 18 without using a bus line. An X address that a signal 23 specifies once if necessary is separated from an X data 22 with the aid of a signal 26 so as to select. One bit designated by an address in the RAM obtains one vs one correspondence to one display segment. In a 128 segment, information for displaying is stored in a 128-bit space in the RAM 17. Accordingly, data rewriting is completed only by rewriting data accounting for the space of bits in the RAM corresponding to the segment in which data has to be rewritten.</p> |
