发明名称 EPPOM INTEGRATED CIRCUIT DEVICE
摘要 <p>PURPOSE:To form an EPROM integrated circuit device capable of obtaing four states with only the combinations of inputs of high power source terminal and a write control input terminal by providing a state control circuit which generates the four states: a write state, a standby state, a verify state, and a read state, from the output of a write voltage detection circuit and a write control input. CONSTITUTION:The titled device is constituted with a write voltage detection circuit VDET1, a state control circuit STSC2, an EPROM element circuit MCEL3, an address decoder circuit ADDEC4, a sense amplifier circuit SENS5, and a write control circuit WCTR6. And the device is equipped with a high power source terminal Vpp connected to the VDET1, a write control input terminal WCT connected to the STSC2, plural address input terminals ADDIN, plural data input/output terminals DAIO, a power source terminal Vcc, and an earth terminal GND. The STSC2 is constituted with a decoder circuit, and '0', for example, is outputted in a normal time from a detection signal line VH, and '1' as a detection signal, and when '0' or '1' is supplied to a write control line, outputs shown in table 1 are obtained at signal lines W, VF, and STB, corresponding to the write state, the verify state, and the standby state.</p>
申请公布号 JPS62173695(A) 申请公布日期 1987.07.30
申请号 JP19860016273 申请日期 1986.01.27
申请人 NEC CORP 发明人 URIYA SUSUMU;KACHI YOSHIO;HARA TAKAAKI;KIMURA KATSUHARU
分类号 G11C17/00;G11C16/06 主分类号 G11C17/00
代理机构 代理人
主权项
地址