发明名称 ERROR RECOVERY SYSTEM FOR LOGIC UNIT
摘要 PURPOSE:To reduce the probability of system breakdown and to secure the continuous CPU processing by using a register which can set an error recovery mode coincident with a user request. CONSTITUTION:When a CPU (logic unit) 10 has an error, an error recovery controller 30 obtains the error information from the CPU 10 and checks whether an error instruction can be retried or not. If the retrial is possible, the error instruction is retried after 1 is subtracted from the contents of a retrial frequency register 70. While an exclusive OR is secured between a logic unit component register 40 and a logic unit status register 50. As a result, the presence or absence of a normal CPU is checked according to the bit number of logic '1'. If a normal CPU is confirmed, the error instruction is executed again on the normal CPU. If no normal CPU is confirmed, an instruction re-execution unable processing is carried out.
申请公布号 JPS62173536(A) 申请公布日期 1987.07.30
申请号 JP19860014798 申请日期 1986.01.28
申请人 NEC CORP 发明人 YAMAMOTO SUMIO
分类号 G06F11/14;G06F11/20 主分类号 G06F11/14
代理机构 代理人
主权项
地址