| 摘要 |
PURPOSE:To prevent the reduction in margin due to jitter by detecting the phase relation between an input pulse data read from a magnetic recorder and a sampling clock formed from the data so as to shift the phase of the data or the clock. CONSTITUTION:A VPO clock is separated from an input pulse data read from the magnetic recorder by a VFO circuit 1 and a sampling clock to demodulate the input pulse data is generated by a sampling clock generating circuit 2. The phase relation between the VPO clock and the input pulse data is detected by a phase detection circuit 3 and the phase of the sampling clock is shifted by a prescribed value by the sampling clock shift circuit 4 in response to the shift with the reference phase relation. Then the margin lowered due to jitter is recovered substantially to form a width of the input pulse data.
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