| 摘要 |
PURPOSE:To enable the generation of a test signal, to dispense with the exclusive input terminal of the test signal and to realize highly functional IC, by applying the predetermined low voltage of the power source terminal of C-MOS- IC. CONSTITUTION:When voltage of a wave form 11 is inputted to the terminal of a power source, a low voltage detection circuit 2 detects a predetermined low voltage level 15 or less to generate a low voltage signal 12 changing from a H-level to a L-level. When this signal 12 is inputted to a falling edge detection circuit 6, the H-level signal 13 corresponding to the delay time of a delay circuit 4 is outputted and test mode setting R-SFF7 is set and the output 14 thereof shows a test mode.
|
