发明名称 CHECKING METHOD FOR CONNECTION STATE OF MEMORY
摘要 PURPOSE:To check a short circuit between wirings by comparing the content of a read address with a value when stored, judging a state as abnormal when compared results are not equal, and performing such operation in order on the addresses from low-ordered to high-ordered. CONSTITUTION:A COU 1 executes a program stored in a ROM 2, and performs a prescribed data processing operation making access a required data to a RAM 3. In an initial state corresponding to the throw in of a power source, etc., or by every regulated condition, it executes a check program, and checks the connection status of buses 6 and 7 to the RAM 3, and when it is judged as abnormal, it sends out an alarm signal through an I/F 5, and displays an abnormality with a cathode ray tube display device, etc. When only a fundamental program is stored at the ROM 2, and a main program is stored at the RAM 3 from an external memory, such as a floppy disk, etc., various kinds of deformation of programs, for example, the insertion of the check program to the forefront of those programs, can be performed freely. In this way, the check for the connection status of the bus to various kinds of devices can be performed efficiently.
申请公布号 JPS62172452(A) 申请公布日期 1987.07.29
申请号 JP19860012144 申请日期 1986.01.24
申请人 NEC HOME ELECTRONICS LTD 发明人 TAKENAKA TOYOHIRO
分类号 G06F12/16 主分类号 G06F12/16
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