| 摘要 |
PURPOSE:To effectively suppress the generation of a runaway state by providing a counter with a reset function which is reset responding to a watchdog timer signal, and outputs a watchdog interruption signal in a count up time. CONSTITUTION:When '1' is allocated to a watchdog timer signal generating bit WDb, a watchdog timer signal WDS is outputted at every access of a program counter to a program bit arrangement including the bit, and a counter 6 with the reset function is reset. In other words, the counter 6 is reset at every two execution programs in this case. Therefore, when the program counter runs away, and accesses at random, a normal watchdog timer signal WDS is not outputted, generating an intermittent output. In this way, it is possible to recover the program counter to its normal state again by outputting a watchdog/interruption signal INT.WD.
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