发明名称 BUFFER AMPLIFYING CIRCUIT
摘要 PURPOSE:To realize a characteristic of a low output impedance extending over a wide frequency by a small number of transistors, by connecting an output terminal and the second input of an operational amplifier, and connecting a bias circuit between the output terminal and the second power source. CONSTITUTION:A base of a transistor TR Q1 is connected to an output of an operational amplifier 1 whose one input is connected to an input terminal IN, connected to an output terminal OUT having a load capacity C through its emitter resistance R1, and its collector is connected to a base of a TR Q2, and also, connected to the first power source VCC through a resistance R2. An emitter of the TR Q2 is connected to the power source VCC through a resistance R3, and its collector is connected to the terminal OUT. The terminal OUT and the other input of the amplifier 1 are connected, and also, a bias circuit 4 is connected between the terminal OUT and the second power source VEE. In this way, by selecting suitably a resistance value of the resistances R1, R2 and R3, a low output impedance can be realized.
申请公布号 JPS62172804(A) 申请公布日期 1987.07.29
申请号 JP19860013812 申请日期 1986.01.27
申请人 HITACHI LTD 发明人 SAITO TAKASHI;YAMAMURA HIDEO
分类号 H03F1/42;H03F3/04;H03F3/50 主分类号 H03F1/42
代理机构 代理人
主权项
地址