| 摘要 |
PURPOSE:To prevent the delay in the circuit operation in a low voltage LSI by providing a power supply circuit applying a different voltage from a power voltage and a means impressing the voltage generated from the said power supply to a gate of a MOS transistor (TR) of an output stage. CONSTITUTION:When a level of a gate 13 is Vcc and a level of a gate 14 is a ground level, the output voltage reaches a high level, and when the level of the gate 13 is a ground level and the level of the gate 14 is the Vcc level conversely, the output 1 goes to the ground level, then the operation above corresponds to the output of information '1', '0'. Thus, the drive capability when the MOS TRs 11, 12 are turned on is increased and the delay at the output 1 is decreased. The gate 13 is controlled by the inverter comprising an N-channel MOS TR 21 and P-channel MOS TRs 22, 23 and the control circuit is activated by using an output 4 of the power supply circuit in the LSI chip as a power supply. The gate 14 is controlled by a circuit comprising MOS TRs 24, 25, 26 similarly. |
