| 摘要 |
PURPOSE:To decide even long data based on a practical circuit amount by using a signal generated in the highest order effective bit position deciding circuit by zero detection. CONSTITUTION:The bit deciding circuit 8 executes the zero detection of the output of an arithmetic circuit 3 in gates G4-G1 at every bit. According to the result a gate G5 executes the zero detection of data, while gates G6 and G7 output signals Q3 and Q2 as the highest order effective bit position at every four bits. If the gates G4-G2 detect that data at every four bits is not zero,the gate G4, the gate G3 and the gate G2 control gates G22-G24, gates G16-G18 and gates G10-G12, respectively, thereby prohibiting propagation from low-order bits. Thus the outputs B3-B1 of gates G25-G27 can obtain data composed of low-order four bits including the highest order effective bit. Gates G8 and G9 output signals Q1 and Q2 as the highest order effective bit position for low-order four bits. Accordingly output ZER0 and the signals Q3-Q2 can obtain a zero detection signal and the highest order effective bit position signal.
|
