发明名称 DEBUGGING DEVICE FOR MICROPROCESSOR
摘要 PURPOSE:To improve measuring accuracy of real time performance and converage by two-dimensionally arraying coverage memories storing the number of execution addresses and duplicating the address circuit. CONSTITUTION:When a target CPU executes a program, outputs CRLX and CTLY in a segment memory change. Simultaneously an address conversion memory output and a reference address ADDR' composed of addresses outputted from the CPU are outputted. Elements in the array of the coverage memory 200 are accessed, namely, hit by the reference address ADDR' and addresses X and Y made of the CTLX and CTLY in the segment memory. If the address information CTLX and the address information CTLY conflict, that is, the end point of some segment is the start point of other segment, latch circuits 206 and 207 are duplicated in order to surely select the segment memory, thereby avoiding contention.
申请公布号 JPS62171042(A) 申请公布日期 1987.07.28
申请号 JP19860011895 申请日期 1986.01.24
申请人 YOKOGAWA ELECTRIC CORP 发明人 UCHIDA HIROTAKA
分类号 G06F11/28 主分类号 G06F11/28
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